{"url":"http://public2.vulnerablecode.io/api/vulnerabilities/42024?format=json","vulnerability_id":"VCID-nunv-zq3m-ffeu","summary":"A transient execution vulnerability in some AMD processors may allow an attacker to infer data in the L1D cache, potentially resulting in the leakage of sensitive information across privileged boundaries.","aliases":[{"alias":"CVE-2024-36357"}],"fixed_packages":[],"affected_packages":[],"references":[{"reference_url":"https://www.amd.com/en/resources/product-security/bulletin/amd-sb-7029.html","reference_id":"amd-sb-7029.html","reference_type":"","scores":[{"value":"5.6","scoring_system":"cvssv3.1","scoring_elements":"CVSS:3.1/AV:L/AC:H/PR:L/UI:N/S:C/C:H/I:N/A:N"},{"value":"Track","scoring_system":"ssvc","scoring_elements":"SSVCv2/E:N/A:N/T:P/P:M/B:A/M:M/D:T/2025-07-09T13:36:59Z/"}],"url":"https://www.amd.com/en/resources/product-security/bulletin/amd-sb-7029.html"}],"weaknesses":[{"cwe_id":1421,"name":"Exposure of Sensitive Information in Shared Microarchitectural Structures during Transient Execution","description":"A processor event may allow transient operations to access architecturally restricted data (for example, in another address space) in a shared microarchitectural structure (for example, a CPU cache), potentially exposing the data over a covert channel."}],"exploits":[],"severity_range_score":"5.6 - 5.6","exploitability":null,"weighted_severity":null,"risk_score":null,"resource_url":"http://public2.vulnerablecode.io/vulnerabilities/VCID-nunv-zq3m-ffeu"}